Research Topics
The Internet of Things (IoT) has gained significant importance due to its versatile applications in various domains, including smart homes, wearable technology, and industrial automation. However, a common challenge faced by IoT devices is the need for high-speed, short-range communication that is also power-efficient. In this research, our focus is to address this challenge by designing and developing an energy-efficient serial link system specifically tailored for near-sensor applications, with an emphasis on achieving a minimal absolute power consumption.
Contact: Sina Arjmandpour
Neurological disorders in patients have become an increasing burden in societies and the research field attracts more attention. A better understanding of the brain and neuro system is needed. Since the number of electrophysiological signals generated by neurons are normally massive, a large scale, high accuracy, intense density and robust artificial device is needed. Through the recording of optical or electrical signals generated by neurons, such as action potentials (APs) and local-field potentials (LFPs), single-neuron behaviour and neural signalling in neuronal networks can be studied.
Microelectrode Array (MEA) has been one of the most efficient ways of acquiring neural signals from a large number of neurons in terms of number of recording sites, temporal resolution, spatial resolution, and signal-to-noise ratio. MEAs are devices that contain multiple microelectrodes that can be used to obtain or deliver neural signals and serve as a neural interface that connect neurons to detecting devices. They play an important role in understanding the electrophysiological activity of the nervous system, allowing reading and stimulating multiple cells simultaneously. MEAs can be practical in studying pharmacological effects on dissociated cultures, electrical activity from extracellular networks of cardiac cells, and neurons in organs such as the heart and brain.
In this doctorate, my focus will be on designing a neural interface using a new neural signal detecting scheme with a novel cross coupled MEA that senses the electrical double layer (EDL) capacitance as a function of the ion concentration released by neurons.
Contact Yiyang Chen
For wearable and implantable devices, reliable biopotential recording should be ensured even under large artifacts caused by the user’s motion or concurrent electrical stimulation, which can be larger than 100mVPP at the recording IC input. A wide dynamic range (DR) is required for such an artifact-tolerant biopotential-acquisition IC. In addition, ZIN should be large enough to minimize input signal attenuation and common-mode-to-differential-mode conversion of artifacts occurring at the electrode interface. The recording IC should also consume low power for long-time operation with a limited-size battery. In this context, this paper presents an input-impedance-boosted NS-SAR-nested DSM with high DR and power efficiency.
Contact Dr. Kyeongwon Jeong
Recently, All digital phased locked loops (ADPLL) are becoming popular in wireless communication applications because of their small size, reconfigurability, and scalability. For a better performance in case of their output spectrum, a power-hungry time-to-digital converter (TDC) is required. Besides in multi-bit TDC, calibration is mandatory to alleviate the non-linearity effects on the spectral purity. On the other hand, the Bang-bang phase detector can be used as an alternative for power-hungry TDC in ADPLLs and eliminates TDC nonlinearity issues. Furthermore, Digital-to-time-converters (DTC) enables Fractional-N synthesis in Bang-bang PLLs. However, due to the hard non-linear behavior of the phase detector and DTC non-idealities, Bang-bang PLLs suffers from spurious tones in their spectrum. In this research a new technique is going to be used to purify PLL output spectrum and generate an accurate signal for wireless communication circuits.
Contact Long He
Brain-computer interfaces (BCI) have allowed the treatment of a growing number of ailments and diseases such as epilepsy, depression and paralysis. In this context, brain-spine interfaces that bypass a spinal cord lesion have directly linked neural activity to electrical stimulation of muscles, restoring locomotion in non-human primates. In such systems, electromyographic (EMG) recording of the muscle activity is important to form a closed-loop system with the stimulation unit. The EMG platform should perform several functions, i.e. the EMG recording, signal conditioning, digitization and the wireless communication with the stimulator unit. The EMG platform consists of an analog front-end, a data converter, a wireless communication system and a wireless power receiver.
The low-noise amplifier (LNA) which serves as the input stage of the analog front-end is the most power-hungry building block as it suffers from the most stringent noise specification, while the noise contribution from the other stages is attenuated by the LNA gain. However, because the small form factor and the limited available energy extracted by the wireless power receiver, the power dissipation is also highly constrained. Therefore, a key research goal is to conceive energy-efficient amplifier architectures to optimize the noise efficiency of the LNA and reduce the power consumption of the system. At the same time, novel wireless power receiver structures should be explored to improve the power transfer efficiency (PTE) while meeting the requirements on the power delivered to the load.
Contact Gabriele Atzeni
To overcome the limitations of the traditional silicon CIS such as pixel size, dynamic range, sensitivity, and manufacturing cost, we are developing next-generation CIS using special photodetector made of new material with optimized readout circuit
Contact Kyuik Cho
Over the last decades computing platforms have experienced a drastic reduction in size, and increase in proximity to the user. With the advent of smartphones, this scaling has been limited by the need of a User Interface to allow human interaction. To break this limit, computing platforms are thus moving from being in proximity to the user, to being in proximity to the data source, with the so-called Internet-of-Things (IoT). Such IoT nodes are characterised by a small form factor that strongly limits their battery capacity. This, in conjunction with the need of a long battery life, creates strong constraints on the power consumption of such nodes.
Thus, a lot of effort is being given to the power efficiency of all the components of these nodes. In our laboratory we focus on the optimisation of the always-on timer reference. This, in fact, has to be ultra-low-power, as it is a major contributor to the power consumption of the system when in sleep mode, but also needs to be accurate in order to not waste precious time and power for re-synchronisation during the transmission mode. For these reasons, in our lab we are working on an on-chip reference with high energy efficiency and low PVT sensitivity. Additionally, such reference can be fully integrable, thus removing the need for a bulky 32kHz crystal oscillator, allowing a much easier manufacturing.
Contact Giorgio Cristiano
The recent developments in the wireless communication industry, and the constant increase of communication devices have sparked the interest in highly efficient, high spectral purity frequency synthesis. As a result, the current requirements are increasingly more stringent on specifications such as integrated phase noise (IPN), and spur levels, while not penalising the power consumption. To tackle this constantly growing issue, in our laboratory we are investigating possible new phase locked loop (PLL) structures capable of achieving ultra-low-jitter performances with a low power consumption.
Contact Giorgio Cristiano
Tim works in collaboration with the Spine Biomechanics group of ETH on the development of an implantable platform that can sense, process and transmit certain body parameters to monitor patients’ recovery after spine-fusion surgeries. Given the challenge of battery replacement inside human bodies, his main research interests are in the field of ultra-low-power circuit techniques and systems for the Internet-of-Things.
Contact Tim Keller
Miniaturised systems typically operate under battery-less or battery-limited conditions, so energy management plays an important role in such applications. Most of them employ the duty-cycling operation to save power and they mostly stay in the sleep mode. Timer is one of the essential building blocks and must be turned on even in the sleep mode to manage the timing correctly. In this research, we aim to improve the sensitivity of the timer such as process, voltage and temperature variation while maintaining energy efficiency.
Motivation
A brain-machine interface (BMI) acquires brain activity and translates the information into the data used to control software and hardware such as computers and prostheses. As a potential treatment for many neurological diseases, it has won great attention in academia and industry. We are particularly interested in software/hardware codesign of the neuron decoding system.
Challenge
Minimizing the damage to the brain is one of the primary goals of BMI systems. Wireless, miniaturized, and implantable BMI systems require high accuracy and low power. While the design is very challenging, it also exposes great opportunities for software/hardware codesign.
Topics
- Machine learning algorithm to decodes neural activity by exploiting the current spiking-band-power-based infrastructure and taking the stringent constraints of the miniaturized and implantable devices into consideration.
- Circuit and system design to perform the ML algorithm and integration with the BMI system.
Contact Jiawei Liao
High spectral purity frequency synthesis is indispensable to key modern wireless communication, sensor interface and computation systems where new Phase-Locked-Loop (PLL) architectures are being developed to push forward the system performance metrics and power efficiency figures. In this context, the suppression of integrated phase noise and spur levels while maintaining the power efficiency in PLLs has become a major design challenge.
To address this main design challenge, a new sub-sampling PLL (SSPLL) architecture has been proposed and verified in [1] where the in-band noise level has been suppressed with the help of a new phase detection scheme. Nevertheless, due to the periodic perturbation of the VCO at the sampling instances, the reference spur level of the SSPLLs needs further attention with certain approaches already being developed to alleviate the spur issue [2].
In our laboratory, we are investigating new methods for reducing the spurs in SSPLLs while benefiting from their low in-band noise levels targeting very high purity frequency synthesis with low power figures.
Contact Can Livanelioglu
In recent years, a significant increase of power density in DC-DC converter publications has been observed. This is driven by a stronger demand of smaller and smaller computing devices for the internet-of-Things (IoT) node and mobile applications. Fully Integrated Voltage Regulators (FIVRs) are an attractive solution, offering small form-factors, high efficiency and fast load transient response. Furthermore, FIVRs enable fine-grain dynamic voltage and frequency scaling (DVFS) domains and high power density in complex System-on-Chips (SoC). In our laboratory, we work on innovative Power Management Integrated Circuits (PMICs) to tackle the challenges of novel computing platforms.
References:
• Novello, G. Atzeni, G. Cristiano, M. Coustans and T. Jang, "17.3 A 1.25GHz Fully Integrated DC-DC Converter Using Electromagnetically Coupled Class-D LC Oscillators," 2021 IEEE International Solid- State Circuits Conference (ISSCC), 2021, pp. 260-262, doi: 10.1109/ISSCC42613.2021.9366037.
• E. A. Burton et al., "FIVR — Fully integrated voltage regulators on 4th generation Intel® Core™ SoCs," 2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014, 2014, pp. 432-439, doi: 10.1109/APEC.2014.6803344.
Contact Alessandro Novello
In the history of computing platforms, from mainframes in the 1950s to workstation on the 1960s, personal computers in the 1980s, laptops in the 1990s and now the current smartphones, there is an evident trend toward miniaturization. In our laboratory, we believe that the next generation of computing platform will be in the mm-scale sensor node. The miniaturization of computing devices carries several challenges for many of its building blocks, such as the Power Management Unit (PMU), which is responsible to convert the energy collected by a miniaturized mm-scale Photovoltaic (PV) cell and deliver power to the battery, processor, communications circuits and other integrated circuits. In our group, we work on the design and development of miniaturized Energy Harvesting circuits and PMUs to supply the next generation of mm-scale computing platforms.
References:
• T. Jang et al., "Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II—Data Communication, Energy Harvesting, Power Management, and Digital Circuits," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 9, pp. 2250-2262, Sept. 2017, doi: 10.1109/TCSI.2017.2730638.
• Y. Lee et al., "A Modular 1 mm$^{3}$ Die-Stacked Sensing Platform With Low Power I$^{2}$C Inter-Die Communication and Multi-Modal Energy Harvesting," in IEEE Journal of Solid-State Circuits, vol. 48, no. 1, pp. 229-243, Jan. 2013, doi: 10.1109/JSSC.2012.2221233.
• L. -X. Chuo et al., "7.4 A 915MHz asymmetric radio using Q-enhanced amplifier for a fully integrated 3×3×3mm3 wireless sensor node with 20m non-line-of-sight communication," 2017 IEEE International Solid-State Circuits Conference (ISSCC), 2017, pp. 132-133, doi: 10.1109/ISSCC.2017.7870296.
• S. Oh et al., "A 2.5nJ duty-cycled bridge-to-digital converter integrated in a 13mm3 pressure-sensing system," 2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, pp. 328-330, doi: 10.1109/ISSCC.2018.8310317.
Contact Alessandro Novello
Sound activity detection is a hot topic in consumer and smart city applications. One of the main applications in this area is keyword spotting of human sound that can serve as a natural user interface with IoT devices.
To achieve this goal, we are designing an analog front end of the acoustic sensor to detect the sound if existed and wake up the circuit for further processing of the sound and its detection. Our main challenges in this project besides from the power consumption and accuracy, which are the two most important targets, is the time of detection that shows the agility of our sensor.
Contact Hesam Omdeh Ghiasi
