Welcome our new Postdoc Jiang Gong
From China to The Netherlands to Switzerland!
Jiang is a Chinese national who did his Bachelor in Microelectronics at Jilin University, Changchun, China. For the MSc (also Microelectronics) and the PhD, he moved to Delft University of Technology in The Netherlands.
The title of his PhD thesis was “High-Performance Phase-Locked Loops for Quantum Computing Applications”. Jiang brings 6 years of experience in high-performance and low-power PLL design in both academia and industry, having done 6 successful tape-outs of high-performance PLLs. He is a reviewer for the IEEE JSSC, TMTT, TCAS-I, and SSCL. He was a recipient of the IEEE Solid-State Circuits Society(SSCS) Predoctoral Achievement Award for 2021–2022 and the Chinese Government Award for Outstanding Self-Financed (non-government sponsored) Students Abroad, and a co-recipient of the Best Student Paper Award at IMS-2023(second place).
Jiang will join the EECIS team on January 8, 2024.